            '===========================
            'IMMEDIATE AS SECOND OPERAND
            '===========================

            '======
            regimm:
            '======


            a=ascw
            if v<0 then
              if ima<1 then
                if(a>44)and(a<58)and(a<>47) then ers="Not expecting a number here": ert=31: goto exita
              end if
            end if
            if ima>0 then
              ws=0:se=0
              if a=35 then
                'load immediate address
                co=" "+wd
                '
                if wk1<4 then ers="#symbols only valid with 32+ bit regs":ert=11: goto exita
                  di=0:b1=im:wk=wk1
                  co=hexb(&hc0+ic*8+rg)+co
                  goto encode
                end if
                '
                wordeval(s,swd,i): if ert then goto exita
                '
                if nan then
                  if (a<>46)and(a<>45)and(a<>48) then
                    if wk1<4 then ers="label offsets only valid with 32 or 64 bit regs":ert=11: goto exita
                    wk=wk1
                    b1=im : co=hexb(&hc0+ic*8+rg)+" ga "+wd : goto encode
                  end if
                end if
                '
                v=dv
                ws=0
                if (v<-128)or(v>255) then ws=1 'REQUIRES LONG
                if ws=0 then co=hexb(v)
                if ws=1 then co=hexl(dv)
                '
                'REQUIRES BYTE
                '
                if (wk1=1)or(ima=8) then
                  if ws=1 then ers="Value out of range "+str(v):ert=12: goto exita
                  co=hexb(v)
                end if
                '
                if (wk1>1)and(pn<3) then
                  ws=1 : se=2                     'ASSUME BYTE
                  if (v<-128)or(v>127) then se=0  'REQUIRES LONG
                  if ima=2 then se=0              'FORCE LONG
                  '
                  if se=2 then co=hexb(v) ' 
                  if se=0 then
                    if wk1=2 then co=hexw(v)
                    if wk1>=4 then co=hexl(dv)
                  end if
                  '
                  if flot then co=flos+str(dv) ': qq co,flot
                end if
                if wk1=2 then
                  if (dv>=2^16)or(dv<-2^15) then ers="Value out of range for 16 bit number":ert=10: goto exita
                end if
                if (wk1=4)and(flot=0) then
                  if (dv>=2^32)or(dv<-2^31) then ers="Value out of range for 32 bit number":ert=10: goto exita
                end if
                if pn=13 then
                  if (v<0)or(v>64) then ers=" bit-shift value out of range 1..32/64 ":ert=14: goto exita
                  b1=im:se=0:if wk1>1 then ws=1
                end if
                md=&hc0
                b1=im + se + ws
                b2=md+ic*8+rg
                co=hexb(b2)+co
                di=0:wk=0
                goto encode
            end if





'=====
'NOTES
'=====


'===============
' SIMD ENCODINGS
'===============

        c=0

'SSE2


    '    0f 58 ADDPS        - Packed Single-FP Add : xm to xm   0f:58:c-mx1-xm2 : mem to xm 0f:58:md-xm-rm
    ' f3 0f 58 ADDSS        - Scalar Single- FP Add xm to xm f3:0f:58:c xm1 xm2 :  mem to xm f3:0f:58:md-xm-rm
    '    0f 55 ANDNPS       - Bit-wise Logical And Not for Single-FP :  xm to xm 0f:55:c-mx1-xm2 : mem to xm 0f:55:md-xm-rm
    '    0f 54 ANDPS        - Bit-wise Logical And for Single-FP :  xm to xm 0f:54:c-mx1-xm2 :   mem to xm 0f:54:md-xm-rm
    '    0f c2 CMPPS        - Packed Single-FP Compare : xm to xmmreg, imm8 0f:c2:c-mx1-xm2: imm8 : mem to xmmreg, imm8 0f:c2:md-xm-rm: imm8
    ' f3 0f c2 CMPSS        - Scalar Single-FP Compare : xm to xmmreg, imm8 f3:0f:c2:c xm1 xm2: imm8 :   mem to xmmreg, imm8 f3:0f:c2:md-xm-rm: imm8
    '    0f 2f COMISS       - Scalar Ordered Single-FP compare and set EFLAGS :   xm to xm 0f:2f:c-mx1-xm2 : mem to xm 0f:2f:md-xm-rm
    '    0f 2a CVTPI2PS     - Packed signed INT32 to Packed Single-FP conversion :   mm to xm 0f:2a:c mx1 mmreg1 :  mem to xm 0f:2a:md-xm-rm
    '    0f 2d CVTPS2PI     - Packed Single-FP to Packed INT32 conversion :   xm to mm 0f:2d:c-mm1-xm1 : mem to mm 0f:2d:md-mm-rm
    ' f3 0f 2a CVTSI2SS     - Scalar signed INT32 to Single- FP conversion :   r32 to mx1 f3:0f:2a:c xm r32 :   mem to xm f3:0f:2a:md-xm-rm
    ' f3 0d 2d CVTSS2SI     - Scalar Single-FP to signed INT32 conversion :   xm to r32 f3:0f:2d:c r32 xmmreg : mem to r32 f3:0f:2d:md-r32-rm
    '    0f 2c CVTTPS2PI    - Packed Single-FP to Packed INT32 Conversion (truncate) : xm to mm 0f:2c:c-mm1-xm1 : mem to mm 0f:2c:md-mm-rm
    ' f3 0f 2c CVTTSS2SI    - Scalar Single-FP to signed INT32 conversion (truncate) : xm to r32 f3:0f:2c:c-r32-xm1 : mem to r32 f3:0f:2c:md-r32-rm
    '    0f 5e DIVPS        - Packed Single-FP Divide : xm to xm 0f:5e:c-mx1-xm2 : mem to xm 0f:5e:md-xm-rm
    ' f3 0f 5e DIVSS        - Scalar Single-FP :   Divide f3:0f:5e:c-xm1-xm2 : xm to xm : mem to xm f3:0f:5e:md-xm-rm
    '    0f ae 40 FXRSTOR   - Restore FP/MMX and Streaming SIMD Extensions state : 0f:ae:40+m512
    '    0f ae 00 FXSAVE    - Store FP/MMX and Streaming SIMD Extensions state : 0f:ae:00+m512 
    '    0f ae 80 LDMXCSR   - Load Streaming SIMD Extensions Technology Control/Status Register : m32 to MXCSR 0f:ae:80+m32

    '    0f 5f MAXPS        - Packed Single-FP Maximum :   xm to xm 0f:5f:c-mx1-xm2 : mem to xm 0f:5f:md-xm-rm
    ' f3 0f 5f MAXSS        - Scalar Single-FP Maximum : xm to xm f3:0f:5f:c-xm1-xm2 : mem to xm f3:0f:5f:md-xm-rm
    '    0f 5d MINPS        - Packed Single- FP Minimum : xm to xm 0f:5d:c-mx1-xm2 : mem to xm 0f:5d:md-xm-rm
    ' f3 0f 5d MINSS        - Scalar Single-FP Minimum : xm to xm f3:0f:5d:c-xm1-xm2 : mem to xm f3:0f:5d:md-xm-rm
    '    0f 28 MOVAPS       - Move Aligned Four Packed Single-FP : mx2 to mx1 0f:28:c mx2 xm1 : mem to mx1 0f:28:md-xm-rm : mx1 to mx2 0f:29:c-mx1-xm2 : mx1 to mem 0f:29:md-xm-rm
    '    0f 90 MOVHLPS      - Move High to Low Packed Single-FP : xm to xm 0f:90:c-mx1-xm2
    '    0f 16 MOVHPS       - Move High Packed Single-FP : mem to xm 0f:16:md-xm-rm : xm to mem 0f:17:md-xm-rm
    '    0f 16 MOVLHPS      - Move Low to High Packed Single-FP : xm to xm 0f:16:c-mx1-xm2
    '    0f 90 MOVLPS       - Move Low Packed Single-FP : mem to xm 0f:90:md-xm-rm : xm to mem 0f:91:md-xm-rm
    '    0f 50 MOVMSKPS     - Move Mask To Integer : xm to r32 0f:50:c r32 xmmreg
    ' f3 0f 80 MOVSS        - Move Scalar Single-FP : mx2 to mx1 f3:0f:80:c-xm2-xm1 : mem to mx1 f3:0f:80:md-xm-rm : mx1 to mx2 f3:0f:80:c-xm1-xm2 : mx1 to mem f3:0f:80:md-xm-rm
    '    0f 80 MOVUPS       - Move Unaligned Four Packed  single-FP : mx2 to mx1 0f:80:c mx2 xm1 :   mem to mx1 0f:80:md-xm-rm : mx1 to mx2 0f:81:c-mx1-xm2 : mx1 to mem 0f:81:md-xm-rm
    '    0f 59 MULPS        - Packed Single-FP Multiply : xm to xm 0f:59:c-mx1-xm2 : mem to xm 0f:59:md-xm-rm
    ' f3 0f 59 MULSS        - Scalar Single-FP Multiply : xm to xm f3:0f:59:c-xm1-xm2 : mem to xm f3:0f:59:md-xm-rm
    '    0f f7 MASKMOVQ     - Byte Mask Write :   mm to mm 0f:f7:c-mm1-mm2
    '    0f 2b MOVNTPS      - Move Aligned Four Packed Single-FP Non Temporal :   xm to mem 0f:2b:md-xm-rm
    '    0f e7 MOVNTQ       - Move 64 Bits Non Temporal :   mm to mem 0f:e7:md-mm-rm

    '    0f 56 ORPS:        - Bit-wise Logical OR for Single-FP Data : xm to xm 0f:56:c-mx1-xm2 : mem to xm 0f:56:md-xm-rm
    '    0f 53 RCPPS        - Packed Single-FP Reciprocal : xm to xm 0f:53:c-mx1-xm2 : mem to xm 0f:53:md-xm-rm
    ' f3 0f 53 RCPSS        - Scalar Single-FP Reciprocal : xm to xm f3:0f:53:c-xm1-xm2 : mem to xm f3:0f:53:md-xm-rm
    '    0f 52 RSQRTPS      - Packed Single-FP Square Root Reciprocal : xm to xm 0f:52:c-mx1-xm2 : mem to xm 0f:52 mode-xm-rm
    ' f3 0f 52 RSQRTSS      - Scalar Single-FP Square Root Reciprocal : xm to xm f3:0f:52:c-xm1-xm2 : mem to xm f3:0f:52:md-xm-rm
    '    0f c6 SHUFPS       - Shuffle Single-FP : xm to xmmreg, imm8 0f:c6:c-mx1-xm2:imm8 : mem to xmmreg, imm8 0f:c6:md-xm-rm:imm8
    '    0f 51 SQRTPS       - Packed Single-FP Square Root : xm to xm 0f:51:c-mx1-xm2 : mem to xm 0f:51:md-xm-rm
    ' f3 0f 51 SQRTSS       - Scalar Single-FP Square Root : xm to xm f3:0f:51:c-xm1-xm2 : mem to xm f3:0f:51:md-xm-rm
    '    0f ae STMXCSR      - Store Streaming SIMD Extensions Technology Control/Status Register : MXCSR to mem 0f:ae:c m32
    '    0f 5c SUBPS        - Packed Single-FP Subtract : xm to xm 0f:5c:c-mx1-xm2 : mem to xm 0f:5c:md-xm-rm
    ' f3 0f 5c SUBSS        - Scalar Single-FP Subtract : xm to xm f3:0f:5c:c-xm1-xm2 : mem to xm f3:0f:5c:md-xm-rm
    '    0f ae f8 SFENCE    - Store Fence 0f:ae:f8 
    '    0f 2e UCOMISS      - Unordered Scalar Single-FP compare and set EFLAGS : xm to xm 0f:2e:c-mx1-xm2 : mem to xm 0f:2e:md-xm-rm
    '    0f a1 UNPCKHPS     - Unpack : High Packed Sing  le-FP Data : xm to xm 0f:a1:c-mx1-xm2 : mem to xm 0f:a1:md-xm-rm
    '    0f a0 UNPCKLPS     - Unpack Low Packed Single-FP Data : xm to xm 0f:a0:c-mx1-xm2 : mem to xm 0f:a0:md-xm-rm
    '    0f 57 XORPS        - Bitwise Logical Xor for Single-FP Data : xm to xm 0f:57:c-mx1-xm2 : mem to xm 0f:57:md-xm-rm

    ' 0f e0 PAVGB           - Packed Average : mm to mm 0f:e0:c-mm1-mm2 : 0f:e3:c-mm1-mm2 : mem to mm 0f:e0:md-mm-rm : 0f:e3:md-mm-rm
    ' 0f e3 PAVGW           - Packed Average : mm to mm 0f:e0:c-mm1-mm2 : 0f:e3:c-mm1-mm2 : mem to mm 0f:e0:md-mm-rm : 0f:e3:md-mm-rm
    ' 0f c5 PEXTRW          - Extract Word :   mm to reg32, imm8 0f:c5:c mm r32: imm8
    ' 0f c4 PINSRW          - Insert Word : reg32 to mmreg, imm8 0f:c4:c r32 mmreg1: imm8 : m16 to mmreg, imm8 0f:c4:md-mm-rm: imm8
    ' 0f ee PMAXSW          - Packed Signed Integer Word Maximum : mm to mm 0f:ee:c-mm1-mm2 : mem to mm 0f:ee:md-mm-rm
    ' 0f de PMAXUB          - Packed Unsigned Integer Byte Maximum : mm to mm 0f:de:c-mm1-mm2 : mem to mm 0f:de:md-mm-rm
    ' 0f ea PMINSW          - Packed Signed Integer Word Minimum : mm to mm 0f:ea:c-mm1-mm2 :  mem to mm 0f:ea:md-mm-rm
    ' 0f da PMINUB          - Packed Unsigned Integer Byte Minimum Y : mm to mm 0f:da:c-mm1-mm2 : mem to mm 0f:da:md-mm-rm
    ' 0f d7 PMOVMSKB        - Move Byte Mask To Integer O : mm to reg32 0f:d7:c-mm1-r32 : 
    ' 0f f6 PSADBW          - Packed Sum of Absolute Differences I O : mm to mm 0f:f6:c-mm1-mm2 : mem to mm 0f:f6:md-mm-rm
    ' 0f 70 PSHUFW          - Packed Shuffle Word : mm to mmreg, imm8 0f:70:c-mm1-mm2: imm8 :   mem to mmreg, imm8 0f:70:c:md-mm-rm: imm8


'SSE2 extended

    ' 66 0f 10 MOVUPD   - Move Unaligned 
    ' 66 0f 12  MOVLPD   - Move  
    ' 66 0f 16 MOVHPD   - Move 
    ' 66 0f 14 UNPCKLPD   -
    ' 66 0f 15 UNPCKHPD   -  


'SSE3



    ' 66,0F,D0,/r ADDSUBPD xmm1, xmm2/m128 Add /Sub packed DP FP numbers from XMM2/Mem to XMM1. Y Y Y Y Y 
    ' F2,0F,D0,/r ADDSUBPS xmm1, xmm2/m128 Add /Sub packed SP FP numbers from XMM2/Mem to XMM1. Y Y Y Y Y
    ' DF /1 FISTTP m16int Store ST in int16 (chop) and pop. Y Y DB /1 FISTTP m32int Store ST in int32 (chop) and pop. Y Y
    ' 66,0F,7C,/r HADDPD xmm1, xmm2/m128 Add horizontally packed DP FP numbers XMM2/Mem to XMM1. Y Y Y Y Y
    ' F2,0F,7C,/r HADDPS xmm1,xmm2/m128 Add horizontally packed SP FP numbers XMM2/Mem to XMM1 Y Y Y Y Y
    ' 66,0F,7D,/r HSUBPD xmm1, xmm2/m128 Sub horizontally packed DP FP numbers XMM2/Mem to XMM1 Y Y Y Y Y
    ' F2,0F,7D,/r HSUBPS xmm1,xmm2/m128 Sub horizontally packed SP FP numbers XMM2/Mem to XMM1 Y Y Y Y Y
    ' F2,0F,F0,/r LDDQU xmm, m128 Load unaligned integer 128-bit. 0F,01,C8 MONITOR eax, ecx, edx Set up a linear address range to be monitored by hardware.
    ' F2,0F,12,/r MOVDDUP xmm1, xmm2/m64 Move 64 bits representing one DP data from XMM2/Mem to XMM1 and duplicate.
    ' F3,0F,16,/r MOVSHDUP xmm1, xmm2/m128 Move 128 bits representing 4 SP data from XMM2/Mem to XMM1 and duplicate high.
    ' F3,0F,12,/r MOVSLDUP xmm1,xmm2/m128 Move 128 bits representing 4 SP data from XMM2/Mem to XMM1 and duplicate low.
    ' 0F,01,C9 MWAIT eax, ecx Wait until write-back store performed within the range specified by the instruction MONITOR.


'SSE4


    ' 66 0F 3A 0D BLENDPD xmm1, xmm2/m128, imm8 Blend Packed Double Precision Floating-Point Values
    ' 66 0F 3A 0C BLENDPS xmm1, xmm2/m128, imm8 Blend Packed Single Precision Floating-Point Values
    ' 66 0F 38 15 BLENDVPD xmm1, xmm2/m128, <XMM0> Variable Blend Packed Double Precsion Floating-Point Values
    ' 66 0F 38 14 BLENDVPS xmm1, xmm2/m128, <XMM0> Variable Blend Packed Single Precision Floating-Point Values
    ' 66 0F 3A 41 DPPD xmm1, xmm2/m128 imm8 Dot Product of Packed Double Precision Floating Point Values
    ' 66 0F 3A 40 DPPS xmm1, xmm2/m128. imm8 Dot Product of Packed Single Precision Floating Point Values
    ' 66 0F 3A 17 EXTRACTPS r/m32, xmm imm8 Extract Packed Single Precision Floating-Point Value
    ' 66 0F 3A 21 INSERTPS xmm1, xmm2/m32, imm8 Insert Packed Single Precision Floating-Point Value
    ' 66 0F 38 2A MOVNTDQA xmm, m128 Load Double Quadword Non-Temporal Aligned Hint
    ' 66 0F 3A 42 MPSADBW xmm1, xmm2/m128, imm8 Compute Multiple Packed Sums of Absolute Difference
    ' 66 0F 38 2B PACKUSDW xmm1,xmm2/m128 Pack with Unsigned Saturation
    ' 66 0F 38 10 PBLENDVB xmm1,xmm2/m128, <XMM0> Variable Blend Packed Bytes
    ' 66 0F 3A 0E PBLENDW xmm1, xmm2/m128, imm8 Blend Packed Words
    ' 66 0F 38 29 PCMPEQQ xmm1, xmm2/m128 Compare Packed Qword Data for Equal
    ' 66 0F 3A 14 PEXTRB r32/m8, xmm, imm8 Extract Byte
    ' 66 0F 3A 16 PEXTRD r/m32, xmm, imm8 Extract Dword
    ' 66 REX.w 0F 3A 16 PEXTRQ r/m64, xmm, imm8 Extract Qword
    ' 66 0F 3A 15 PEXTRW r/m16, xmm, imm8 Extract Word ' ? ALTERNATIVE CODING
    ' 66 0F 38 41 PHMINPOSUW xmm1, xmm2/m128 Packed Horizontal Word Minimum
    ' 66 0F 3A 20 PINSRB xmm1, r32/m8, imm8 Insert Byte
    ' 66 0F 3A 22 PINSRD xmm1, r/m32, imm8 Insert Dword
    ' 66 REX.w 0F 3A 22 PINSRQ xmm1, r/m64, imm8 Insert Qword
    ' 66 0F 38 3C PMAXSB xmm1, xmm2/m128 Maximum of Packed Signed Byte Integers
    ' 66 0F 38 3D PMAXSD xmm1, xmm2/m128 Maximum of Packed Signed Dword Integers
    ' 66 0F 38 3F PMAXUD xmm1, xmm2/m128 Maximum of Packed Unsigned Dword Integers
    ' 66 0F 38 3E PMAXUW xmm1, xmm2/m128 Maximum of Packed Unsigned Word Integers
    ' 66 0F 38 38 PMINSB xmm1, xmm2/m128 Minimum of Packed Signed Byte Integers
    ' 66 0F 38 39 PMINSD xmm1, xmm2/m128 Minimum of Packed Signed Dword Integers
    ' 66 0F 38 3B PMINUD xmm1, xmm2/m128 Minimum of Packed Unsigned Dword Integers
    ' 66 0F 38 3A PMINUW xmm1, xmm2/m128 Minimum of Packed Unsigned Word Integers
    ' 66 0F 38 21 PMOVSXBD xmm1, xmm2/m32 Packed Move with Sign Extend - Byte to Dword 
    ' 66 0F 38 22 PMOVSXBQ xmm1, xmm2/m16 Packed Move with Sign Extend - Byte to Qword
    ' 66 0F 38 20 PMOVSXBW xmm1, xmm2/m64 Packed Move with Sign Extend - Byte to Word
    ' 66 0F 38 23 PMOVSXWD xmm1, xmm2/m64 Packed Move with Sign Extend - Word to Dword
    ' 66 0F 38 24 PMOVSXWQ xmm1, xmm2/m32 Packed Move with Sign Extend - Word to Qword
    ' 66 0F 38 25 PMOVSXDQ xmm1, xmm2/m64 Packed Move with Sign Extend - Dword to Qword
    ' 66 0F 38 31 PMOVZXBD xmm1, xmm2/m32 Packed Move with Zero Extend - Byte to Dword
    ' 66 0F 38 32 PMOVZXBQ xmm1, xmm2/m16 Packed Move with Zero Extend - Byte to Qword
    ' 66 0F 38 30 PMOVZXBW xmm1,xmm2/m64 Packed Move with Zero Extend - Byte to Word
    ' 66 0F 38 33 PMOVZXWD xmm1, xmm2/m64 Packed Move with Zero Extend - Word to Dword
    ' 66 0F 38 34 PMOVZXWQ xmm1,xmm2/m32 Packed Move with Zero Extend - Word toQword
    ' 66 0F 38 35 PMOVZXDQ xmm1, xmm2/m64 Packed Move with Zero Extend - Dword to Qword
    ' 66 0F 38 28 PMULDQ xmm1, xmm2/m128 Multiply Packed Signed Dword Integers
    ' 66 0F 38 40 PMULLD xmm1, xmm2/m128 Multiply Packed Signed Dword Integers and Store Low Result
    ' 66 0F 38 17 PTEST xmm1, xmm2/m128 Logical Compare 
    ' 66 0F 3A 09 ROUNDPD xmm1, xmm2/m128, imm8 Round Packed Double Precision Floating-Point Values
    ' 66 0F 3A 08 ROUNDPS xmm1, xmm2/m128, imm8 Round Packed Single Precision Floating-Point Values
    ' 66 0F 3A 0B ROUNDSD xmm1, xmm2/m64, imm8 Round Scalar Double Precision Floating-Point Values
    ' 66 0F 3A 0A ROUNDSS xmm1, xmm2/m32, imm8 Round Scalar Single Precision Floating-Point Values


' 3DNOW


    ' dn postfix
    ' flt=3:pn=4:pfx=" 0f 0f":lp=1:b1=&h0a
    ' 0C PI2FW Packed Integer to Floating-Point Word Conversion
    ' 0D PI2FD Packed Integer to Floating-Point Doubleword Conversion
    ' 1C PF2IW Packed Floating-Point to Integer Word Conversion
    ' 1D PF2ID Packed Floating-Point to Integer Doubleword
    ' 8A PFNACC Packed Floating-Point Negative Accumulate
    ' 8E PFPNACC Packed Floating-Point Positive-Negative Accumulate
    ' 90 PFCMPGE Packed Floating-Point Compare Greater or Equal
    ' 94 PFMIN Packed Single-Precision Floating-Point Minimum
    ' 96 PFRCP Floating-Point Reciprocal Approximation
    ' 97 PFRSQRT Packed Floating-Point Reciprocal Square Root Approximation
    ' 9A PFSUB Packed Floating-Point Subtract
    ' 9E PFADD Packed Floating-Point Add
    ' A0 PFCMPGT Packed Floating-Point Compare Greater Than
    ' A4 PFMAX Packed Single-Precision Floating-Point Maximum
    ' A6 PFRCPIT1 Packed Floating-Point Reciprocal Iteration 1
    ' A7 PFRSQIT1 Packed Floating-Point Reciprocal Square Root Iteration 1
    ' AA PFSUBR Packed Floating-Point Subtract Reverse
    ' AE PFACC Packed Floating-Point Accumulate
    ' B0 PFCMPEQ Packed Floating-Point Compare Equal
    ' B4 PFMUL Packed Floating-Point Multiply
    ' B6 PFRCPIT2 Packed Floating-Point Reciprocal or Reciprocal Square Root Iteration 2
    ' B7 PMULHRW Packed Multiply High Rounded Word
    ' BB PSWAPD Packed Swap Doubleword
    ' BF PAVGUSB Packed Average Unsigned Bytes
 

    'CACHE MANAGEMENT
    ' 0f 40 PREFETCHT0  - Prefetch to all cache levels : 0f:c0:01 mem 
    ' 0f 80 PREFETCHT1  - Prefetch to all cache levels : 0f:c0:10 mem 
    ' 0f c0 PREFETCHT2  - Prefetch to L2 cache 0f:c0:c mem 
    ' 0f 00 PREFETCHNTA - Prefetch to L1 cache 0f:c0:00 mem Y 

